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adv7280-M clock problem

Question asked by savva on Apr 18, 2016
Latest reply on Sep 21, 2016 by savva

Hi All.

 

We use adv7280-M chip for our custom board. I am working on Linux driver integration for this chip.

And I started with clock testing.

I use crystal test script first:

42 0F 00; # Exit Power Down Mode ADV7182 writes begin

42 03 0C;

42 1D 40;

42 13 00; #Power up INTRQ pads etc

42 0E 20; //access

42 40 D5;

42 48 80;

42 0E 00; #Program interrupt pin to drive low

As result I can see clock on XTAL pins, but INTRQ pin has high level still. As I understand, I have clock initialization fail.

 

After that I tried intialization script to output video stream on MIPI-CSi2 interface

 

##CVBS AUTODETECT##

:AUTODETECT CVBS Single Ended In Ain 1, MIPI Out:

delay 10 ;

42 0F 00 ; Exit Power Down Mode

42 00 00 ; INSEL = CVBS in on Ain 1

42 0E 80 ; ADI Required Write

42 9C 00 ; ADI Required Write

42 9C FF ; ADI Required Write

42 0E 00 ; Enter User Sub Map   

42 03 4E ; ADI Required Write

42 04 57 ; Power-up INTRQ pin

42 13 00 ; Enable INTRQ output driver

42 17 41 ; select SH1

42 1D C0 ; Tri-State LLC output driver

42 52 CD ; ADI Required Write

42 80 51 ; ADI Required Write

42 81 51 ; ADI Required Write

42 82 68 ; ADI Required Write

42 FE 88 ; Set CSI Map Address

88 DE 02 ; Power up MIPI D-PHY

88 D2 F7 ; ADI Required Write

88 D8 65 ; ADI Required Write

88 E0 09 ; ADI Required Write

88 2C 00 ; ADI Required Write

88 00 00 ; Power up MIPI CSI-2 Tx

End

As result I can see digital sygnal on D0P and D0N pins but can`t see MIPI CLK sygnal. on CLK P and CLK N pins

 

I checked sygnal on XTAL. It is 28.63636 MHz.

 

Can anybody give me advice, what could be wrong in my initialization. As I understand I have fail with my clock initialization, but why I can see sygnal on MIPI interface. May be any register, where I can read error status or anything like that.

 

Thanks.

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