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ADV7391: problem with VSYNC/HSYNC input timings.

Question asked by glykk on Apr 18, 2016
Latest reply on Apr 18, 2016 by JeyasudhaMuthuPerumal

Total input resolution 858x525. Active resolution 720x480. CLKIN at 54MHz. SMPTE 293M.

Sample rate 27MHz.YCbCr 4:2:2 input, monochrome.


We cannot seem to get the VSYNC/HSYNC timing right. We ‘ve tried a large number of  VSYNC/HSYNC positions during frame time but none seems to work. The image seems starting at THE CENTER of the monitor, so we get both vertical blanking and horizontal blanking at the center of the image. Is this a VSYNC/HSYNC issue or something else?


Our configuration is:

Reg 0x00=0x10 => DAC1 power on. PLL on.

Reg 0x80=0x10 => NTSC.

Reg 0x82=0x4B => SSAF filter ON, SD pedestal ON, SD pixel data valid, SD DAC1 outputs CVBS.

Reg 0x84=0x30 => SD chroma disabled, SD burst disabled.

Reg 0x87=0x00 => autodetection off.

Reg 0x88=0x02 => SD progressive, SD YcbCr input.

Reg 0x8A=0x0A => SD timing mode 1 (VSYNC/HSYNC sync).


We have no evaluation board.


We also tried with CLKIN at 27MHz but no improvement either. SD color bars (Reg 0x84[6]=1, CLKIN=27MHz) do come out correctly.