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FMCDAQ2 - Help with converter PRBS test issues?

Question asked by BrianE Employee on Apr 11, 2016
Latest reply on Jun 14, 2016 by Shrutika

Summarizing customer issue:

 

SETUP (basic functionality of FMCDAQ2 up and running):

   Compiled the source code provided by ADI using the source labeled FMCDAQ2 from the GIT repository as instructed here:  https://wiki.analog.com/resources/fpga/docs/hdl#building_on_vivado

   Generated a bit file; loaded it onto the Xilinx KCU105 development board.

   Generated the baremetal app as instructed here: https://wiki.analog.com/resources/eval/user-guides/ad-fmcdaq2-ebz/software/baremetal

   Compiled and ran using Xilinx SDK.

   Confirmed that the clocks and registers are being set according to the sample code provided.

 

BASIC TEST:

   Run the code --> See tones gen'd by DAC (at SMA connectors) --> SW reports successful initializations:

AD9523 successfully initialized.

AD9144 PLL/link ok.

AD9144 dac-0 calibration ok.

AD9144 dac-1 calibration ok.

AD9144 successfully initialized.

JESD204B successfully initialized.

AD9680 PLL is locked.

AD9680 successfully initialized.

JESD204B successfully initialized.

DAC Core successfully initialized.

 

AD9680 ADC PRBS ISSUE:

   The code provided configures PRBS testing for the ADC.

   It sets up the AD9680 to send PN23 sequence and then configures the ADC Core in the FPGA to monitor PN23.

   The PN Status reports back failures - can someone advise why?:

   Reading address 0x404 REG_CHAN_STATUS in the ADC Core

     (see https://wiki.analog.com/resources/fpga/docs/hdl#building_on_vivado )

   REG_CHAN_STATUS yields PN_ERR[2] and PN_OOS[1] either value 0x04 or 0x06.

   No alterations were made of any settings provided with the kit except adding register reads to debug.

 

AD9144 DAC PRBS ISSUE:

   No code provided for PRBS testing of the DAC.

   Wrote a routine that sets up the DAC core to send PN sequence.

   The PN generator is prior to the JESD core so used "Datapath PRBS" instructions per AD9144 datasheet (Rv.A, pg.74) 

    {Why is no PRBS test provided for the DAC?}

   Can someone please confirm whether this [below] PRBS test [failure] is valid and why?

 

PRBS Checker Enabled

DATAPATH PRBS IRQ EVENT 1: (0x0).

DATAPATH PRBS IRQ EVENT 2: (0x0).

 

Next, I checked the IRQ's, then read the status register 0x14b. 

 

FIRST READ*:

     PRBS STATUS register 0x14b: (0x01).

     I ERROR COUNT: (0xFF).

     Q ERROR COUNT: (0xFF).

*First read follows the instructions exactly.

The first read sequence sees incorrect PRBS sequences and reports error counts.

 

SECOND READ**:

     PRBS STATUS register 0x14b: (0xC0).

     I ERROR COUNT: (0xFF).

     Q ERROR COUNT: (0xFF).

**Second read sequence:  first reset the PRBS test, release reset and enable the test, wait 500ms (as instructed); 

after the wait:  stop the test, read the status and error count registers (stopping the test is the only change made). 

Bits 6 and 7 of the status register indicate that the correct PRBS sequence was detected on both I and Q channels.

But there are still error counts reported.

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