I am developing an app using ADAU1452 (as master) and Sigma Studio. I am using the delay block Z-n Delay which allows to select DM0 or DM1 bank. I am using both in different delay blocks (with different channels) to have as much delay as possible (, so I am setting the maximum delay relative to the DM0 and DM1 capacity.
If I set my maximum delay to maximum DM0 capacity it compiles successfully and indicates DM0 and DM1 at 100%, but the DSP doesn't work, the DSP not even generates clocks.
If I reduce my maximum delay to DM0 of 80%, dsp generates clocks, but it doesn't proccess audio.
If I reduce it then to 70% or so, dsp works properly. But the delay I can get now is not as much as I thought I could have.
Evidently something is not working properly, so maybe the compiler output information is wrong or I am missing something!
I am using the Sigma Studio 3.12V4 beta version wich allows to use this delay block with selectable bank memory.
Any idea about it??I am a bit in a rush to solve this.