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AD9361 Vtune out inquiry

Question asked by jb.larouche on Mar 31, 2016
Latest reply on Apr 1, 2016 by jb.larouche



I have implemented a real-time frequency hopping application using an FPGA and the Fast Profile feature of the AD9361. It works fine but I would like to validate the VCO recalibration time from switching from one frequency to another by using the Vtune signal. From my understanding, it is easily done by setting bit D6 in registers 0x23B/0x27B for RX/TX. My feeling is that enabling these bits shall output a low duty cycle square wave at the EXT_LO_IN ports but I don't see anything. The only result I get from enabling these bits is: no output on the TX1 output port anymore. I use ADI APIs functions to write and read to the chip and I validated that bit D6 equal "1" for the 0x23b/0x27b registers.


Any hints or piece of knowledge to share?


best regards,