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HMC7044 with four signal multi chip SPI bus

Question asked by johnpritchard on Mar 24, 2016
Latest reply on Apr 13, 2017 by kpeker

Dear Sir

I am thinking of using the HMC7044 in a system which uses a conventional 4 signal SPI bus (SCLK, MOSI, MISO, ChipSelectbar) to communicate with multiple chips, with each chip addressed by separate ChipSelectbar signals. I am hoping to use a resistor to separate the MISO and MOSI signals as used on the HMC7044 evaluation board (R18). Can you perceive any problems with this approach? When does the SDATA port change from a high impedance input to a low impedance output and back again? Does the SDATA Control register 0x0054 bit 0, Table 56, only control the SDATA port when in output mode? Or does it deactivate the SDATA port entirely? Can a GPIO port be used to produce the MISO signal (as per Table 55 GPO selection 000001), or does it only reproduce the input SPI data?


Thanks in advance