We are trying to bring up AD-FMCDAQ2-EBZ Rev. E board connected to KC705, by performing JESD transport layer PRBS test for AD9144, however AD9144 registers always seem to indicate that test failed. We are trying to follow the procedure listed in AD9144 datasheet under the title "DATAPATH PRBS", page 74. Here is the procedure we are employing:
1. Following the instructions from AD-FMCDAQ2-EBZ on Microblaze [Analog Devices Wiki] we download the http://swdownloads.analog.com/cse/2015_r1_pre/kc705_fmcdaq2_2015_R1_PRE.zip image to KC705
2. Start the IIO Oscilloscope and connect successfully to the board.
3. Check the JESD link status via following register values:
3.1 Value @ 0x03b = 0x0d => SYNC_BUSY = 0, SYNC_LOCK = 1, SYNC_ROTATE = 1, SYNC_WLIM = 0, SYNC_TRIP = 1
3.2 Value @ 0x470 = 0x0f => Code Group sync achieved for all lanes
3.3 Value @ 0x471 = 0x0f => Frame sync achieved for all lanes
3.4 Value @ 0x473 = 0x0f => ILAS sync achieved for all lanes
4. Start the PRBS7 sequence on the KC705, by setting up the axi_ad9144_core (with AXI_CORE selected for Source in IIO app):
4.1 Write 0x04 to 0x418
5. Initiate the PRBS7 test on AD9144:
5.1 Reset PRBS7 test - Write 0x03 to 0x14b
5.2 Start PRBS7 test - Write 0x01 to 0x14b
5.3 After some time, read out the test status:
5.3.1 Value @ 0x14b = 0x01 => PRBS_GOOD_Q = 0, PRBS_GOOD_I = 0 => Incorrect sequence detected
5.3.1 Value @ 0x024 = 0x0B => PRBS1 = 1, PRBS0 = 1 => DAC0/1 failed PRBS sequence
We have also tried with baremetal drivers with exact same outcome. When ILAs are inserted, data seems to be transmitted to GTX (since it is PRBS7 it is hard to tell if it is correct).
We have run out of ideas on what to try next, so any idea would be helpfull.