for a sigma-delta ADC,
if I have a common-mode voltage bias at the ADC input and I am running my IRN testing, how can I improve results (to minimize retest time)?
Thanks in advance
Here are few thing that you could consider:
In measuring the input referred noise, make sure that you connect a clean dc source to the input of the ADC and clean reference if an external reference is used. Good power supply decoupling is also important in high resolution ADCs.
Operating at a lower output data rate and using higher order SINC filters could also improve the results at the expense measurement time.
Retrieving data ...