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AD9747 Reference Design ported to Vivado

Question asked by maggielim on Mar 18, 2016
Latest reply on Mar 18, 2016 by CsomI

Hello,

 

I am working with the KC705 board and the AD9747 reference design with the Interposer board.

I want to use the old AD9747 IP in Vivado.

 

I have followed the steps bellows for ported the design to Vivado:

1) user_logic.v update:

          a) remove all Bus2IP and IP2Bus related signals/logic/interface/ports/ports definitions. You do not need that anymore. Make sure that everything is removed.

          b) you need to define an AXI slave interface (you can take this as reference). Do not forget the ports definitions.

          c) need to instantiate the up_axi module into the user_logic.v and connect the AXI interface ports to it

          d) connect the up_* ports if the axi_up (all the none up_axi_*) to the up_* ports of the cf_ad9747. You can figure it our which corresponds which by its name.

 

I also modified cf_ad9747.v to support independent read/write access as attached.

I am not sure whether I got the modifications done correctly? it seems still unclear to me.

 

Beside, I have got the errors as below while I try to synthesis the design:

[Synth 8-1031] slv64_array_type is not declared ["C:/Works/AWG3/modules/dac_ad9747/axi_ad9747.vhd":92]

[Synth 8-2556] prefix of LENGTH attribute should be an array or array (sub)type ["C:/Works/AWG3/modules/dac_ad9747/axi_ad9747.vhd":107]

 

I hope someone could help me on this.

Thanks in advanced.

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