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PLL with External VCO, AD4002 and AD4110

Question asked by jsuss on Mar 14, 2016
Latest reply on Mar 14, 2016 by rbrennan

I have 2 questions really for this post: Can I use the AD4110 with an external VCO for my application and if so, is the AD4002 or AD 4110 better for my application?

 

To address the first question, I am attempting to synthesize a 40 MHz clock from a 10 MHz reference. I have an external VCO and wanted to use either the AD4002 or AD4110 PLL eval. boards to evaluate my VCO. My question is will the AD4110 work at 40 MHz? This is below the min. spec listed on the datasheet of 80 MHz, but it was also stated that is the slew rate was above 30V/usec, that lower frequencies could be used. So I attempted to calculate the slew rate for my input signal:

 

SR = A(2pi)f

30V/usec < A(2pi)f

30x10^(6) V/sec < A(2pi)40x10(6) Vhz

(30x10^(6) V/sec)/(pi)80x10(6) hz < A Volts

0.12 V< A Volts

 

I concluded that as long as I ran my signal above 0.12 volts, then the slew rate at 40 MHz should be acceptable. Is this correct?

 

If I can use both the AD4002 and the AD4110, which one is better suited for my application. My main goal is low phase noise, so does one of them have worse noise performance? Any help on this analysis would be greatly appreciated. Thank you!

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