I am working on AD-FMComms3-EBZ board with No-OS software to control the AD9361 part. As you mentioned ,The first step before get started is to build the desired HDL design. I was following step by step procedures that you gave in ADI Reference Designs HDL User Guide [Analog Devices Wiki link to build the HDL design. After adding ad9361 library using ' source ./axi_ad9361_ip.tc' command, I gave generate bit-stream option. Synthesis was completed without any issue. But Implementation part was throwing an error. Error is like this : Place [30 -374] IO placer failed to find a solution .
I also attached screenshot of an error. Please give a solution.. [ I am using vivado 2014.2 version. For this version, I downloaded libraries from GitHub - analogdevicesinc/hdl at hdl_2014_r2: HDL libraries and projects link as mentioned ADI Reference Designs HDL User Guide [Analog Devices Wiki] under Tool Version Section. ]
Please get me the solution .
Thanks in advance.