We have a product with 5 AD9361s on the board. On the latest build we are having a strange AD9361 problem on ~10% of the boards. On these boards the 5th device (furthest from the FPGA) is not working properly.
The symptom we see is that when an ID request is sent over SPI, the response is wrong. It should be 0xA. The attached images show the SPI CLK and DO signals from a board with the problem as well as a known good board. The differences on the problem board are:
- The two ‘1’ bits from the 0xA are missing
- The line is pulled high one clock cycle early. Note that on the good board you can see the difference between the line being driven high by the chip (sharp edge) and being pulled high by the pullup (slow transition).
We have confirmed that the chip has a clock and is not in reset, and all the power rails are up. The SPI inputs (CLK, DI, CE) look the same on good and bad boards. We also tried having the AD9361 replaced on one board, but it made no difference.