I use a FPGA as the controller, ADV212 is in the mode of HIPI. After the system completed the initiating of ADV212, there is a problem of rhe compressed code stream.
The problem is that sometimes the compressed code stream go out with a lot of zero, the number of zero is much more than the compressed code which can be decode to a image, and sometimes the compressed code stream is right which has a little of zero, and the zero is used to make a complete DMA burst an the end of the compressed code stream. I don't know why?
I have check the initial progress, and the progress is same to the UG of programming.
And at the power on start of the PCB board, if the compressed code stream go out with a lot of zero, the state will last to the power down.And if you reset the system to make the FPGA to restart the progress of ADV212's initializing, the compressed code stream may go right . This state is so strage, I want to know wether some other engineers have met this problem? And what's the reason?