I am considering to connect HMC987LP5E LVPECL output buffer Single-Ended AC coupled to CMOS interface. OUTP or OUTN is connected to LDAC~ or LDAC of DACs. The attached diagram is the considering use case. Could you please answer to following questions?
Q1. Is OUTN terminated with 50ohm register recommended? Is floating or grounded acceptable?
Q2. In this Single Ended case what is the specs of VOH and VOL?
Is "Output Voltage High Level" and "Output Voltage Low Level" in "LVPECL DC Output Characteristics" able to be applied?
Q3. LDAC~ is active Low and LDAC is active High. Connecting OUTP1 to LDAC with OUTN1 terminated for one DAC and connecting OUTN2 to LDAC~ with OUTP2 terminated for another DAC. With this method logic of OUTP1 and OUTN2 is inverted I think. Is this usage feasible?