hello i am using the adv7180 with my fpga.

when i get the 8 bit from the adv on the:-> 6 line -> byte number 73 insted of getting-> 128 16 128 16-> in the active video part i get ->>>>128 16 128 17>>> and it is not stable is this problem coming from the i2c registers or from the board ?

the i2c registers are :

reg_data(0) <= x"40 00 01";

reg_data(1) <= x"40 07 09";

reg_data(2) <= x"40 17 41";

reg_data(3) <= x"40 31 02";

reg_data(4) <= x"40 3D A2";

reg_data(5) <= x"40 3E 6A";

reg_data(6) <= x"40 0E 80";

reg_data(7) <= x"40 55 81;

reg_data(8) <= x"40 0E 00";

reg_data(9) <= x"40 04 44";

more info:

in-> PAL, CVBS, AIN2, SD,

out->bt.656 EAV/SAV, 1 ≤ Y ≤ 254, 1 ≤ C/P ≤ 254

ATTACHED A PHOTO OF THE CONNECTION DIAGRAM

here is a picture from signal tap logic analyser