I got No-OS project from internet and have a question about axi_ad9361_dac_dma. what is the difference between the port s_axi_wdata[31:0] and the port s_axi_rdata[31:0](what data do they get ,respectively?)?
It's a bit of a hybrid approach. You can setup multiple segments, but instead of the descriptors being stored in memory (like with normal scatter-gather) they are stored in a FIFO in the DMA controller. The descriptors are programmed to the FIFO using register writes.
These are part of the AMBA AXI4 Lite control interface of the core. Usually you do not need to worry about them, they are managed by the HDL tools.
Moving this thread to Microcontroller no-OS drivers subspace.
Thank you for your reply. I just need to introduce some design of the DMA in my work. But I do not know the design flow of the DMA in the project. Could you tell me where I can find the information?
For an overview of the dataflow please refer to https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/reference_hdl
Thank you for your reply. I have a more question: does the DMA in the project select single register mode or scatter/gather mode?
Thank you for your reply.
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