Hello everyone,

I'm making a custom design on the basis of the reference design FMCMOTCON2.

I'd like to know how many integer bits and fraction bits these two highlighted, 16-bit current signals have, because my design is in fixed-point format, which was built by using Xilinx System Generator.

Thank you for your help.

qxj.

The output of the ΣΔ modulator is a 1 bit serial stream. This stream goes through a sinc3 filter inside the current_monitor IP to get the 16 bit data. This 16 bit data is output on the ia_o and ib_o ports of the current_monitor and corresponds to the ADCvalue in the equation above. When plugging the 16 bit value into the equation it does not have to be interpreted as being fixed point, it can be used as it is, just the result will be fixed point.

When doing things in fixed point arithmetic it's up to you to decide how to scale all the values and choose the number of fractional and integer bits and how to interpret the values. 1 sign bit and 15 fractional bits is the easiest for HDL but it can be anything that gives you enough precision.

Regards,

Andrei