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ADV7850 DDR2 abnormal for PAL CVBS input

Question asked by Schang Employee on Feb 26, 2016
Latest reply on Mar 15, 2016 by GuenterL

Hi,

 

Customer reports an issue for ADV7850 that sometimes the video is crash when PAL CVBS input. Here I summarize the information as below:

 

  • Test source:
    1. DVD player or pattern generator
    2. PAL/50 CVBS only, no problem for NTSC

 

  • How to replicate:
    1. It can be seen on customer’s system, as well as ADV7850 EVB
    2. Connect CVBS source and sink to ADV7850EVB then run the scrip again and again, average once per 100 times. It’s not easy to replicate.
    3. The script is attached, it is derived from latest version of ADV7850 script file.

 

  • Observation when issue occurs:
    1. The register dumps are attached, for both NG and OK cases.
    2. When issue occurs the DDR2 signals become abnormal. The figure below shows the signal status for NG and OK cases. In NG case some of signals are kept as high or low.

ADV7850_DDR2.png

3. When issue occurs toggle SDP_MEM_RESET can fix the issue. We try to add SDP_MEM_RESET in the end of script but it still can see the issue. In addition, when in normal case (means video is no problem) it can see the same issue occasionally by toggling SDP_MEM_RESET.

4. When issue occurs, MEM(0xA8) map Reg. 0x33 seems always to be 0x7D. But in normal case, sometimes this register can also be 0x7D.

5. If disable Frame-TBC and enable 3D-comb in script, the issue can’t be seen. 3D-comb seems no impact for this issue. when issue occurs it’s no any improvement by toggling Frame-TBC bit

 

BR,

Steven

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