Please let me know your advice about description of first MSB in datasheet.
Datasheet P22 _ section of serial interface says below.
"The first bit of the conversion result is valid on the first SCLK falling edge after the CS falling edge"
What does above " valid " mean ?
Is frist bit (MSB) clock out at first falling edge of SLCK ?
Or does above mean that backend of user should latch first bit at first falling edge timing of SCLK ?
Our customer is designing ADC timing and could you give me your advice ?