How should we connect CLK, CLK-B, VT and Vref pins of ADCLK944 when we input 3.3V CMOS clock? Is this OK? Vref=open, VT=open, CLK-B=GND and CLK=3.3V CMOS signal input.
Yes. However, my previous recommendation is for a normal clock signal.
Interfacing DC-coupled 3.3V CMOS into the ADCLK944 is a bit of a challenge.
In order for the input receiver to work properly, it's best if the VIL is >=1.1V. If it's possible to run the ADCLK944 with a split power supply of +2V/-1.3V, the ADCLK944 will work better. It's possible to use the ADCLK944 with a +3.3V/0V power supply, but ideally, we'd like to find a cleaver way to keep VIL>=1.1V.
Another option is use a part like the AD9508.
Could you please advise me about my question? Or if there are any application notes about my question, please let us know.
I apologize. I thought one of my colleages was going to answer this question.
The best way to connect a CMOS input to the ADCLK944 is to use a capacitve divider to AC-couple and reduce the amplitude to about 1.5Vpp. The next concern is to make sure the the complimentary input doesn't change voltage with the normal input.
To accomplish this, connect the VREF pin and a 10nF capacitor to ground on the CLKb pin. Leave the VT pin floating.
On the normal input, the ideal values for the series and shunt capacitors depend on the frequency of the input clock, but 100pF caps should be a good starting point.
One last recommendation: I recommend including a place for a pull-up resistor on the complimentary input, but not populating it. This will allow you to have an external DC bias voltage divider that is stronger than VREF in case you need it.
Thank you for your ansewr.
Following is my understansing. Is it correct?
Thanks & Regards,
Yes. That is correct. The final recommendation is to have a place for a pull-up resistor on CLKb, but do not populate. I do not think you will need a pull-up, but it is good to have a place for one.
On the other hand, how should we do for DC coupled 3.3V CMOS (single-ended)?
Can we use ADCLK944 by DC coupled 3.3V COMS?
Input signal is pulse. Sycle length is 1s. Pulse width is 10us. Can ADCLK944 support like this signal?
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