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ADIsimPLL Prescaler Division Ratio

Question asked by Waelde on Feb 23, 2016
Latest reply on Feb 24, 2016 by dyoung1



I would like to simulate a PLL with HMC703, an external VCO and an external prescaler. The prescaler has a very high division ratio by 16384. The maximum division ratio which can be typed in with ADIsimPLL is 1024, which would be too low.

Is there any possibility to avoid this problem. except dividing the output frequency for the simulation by hand?


Thank you for your help