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ADF4158 Clock Counter Reset

Question asked by serhat.agirbas on Feb 23, 2016
Latest reply on Feb 24, 2016 by rbrennan

Hi,

 

I am using ADF4158 to generate ramp with FSK.I need to synchronize PLL's clk divider with my external signal.Is there any way to reset clock counter, if there is which register should be written, i could not find any information about this in datasheet.

 

Thanks,

 

Serhat Ağırbaş

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