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Video timing options for recognized VICs ?

Question asked by RichardJ on Jun 29, 2011
Latest reply on Jul 1, 2011 by RichardJ

I've a question regarding pixel clocks for CEA861 modes:

 

Am I OK to pick a handy pixel clock frequency so long as I maintain the correct number pixels per line and lines per frame period, that is by trading-off the blanking portions?

 

I have a board with an AD9889 hooked up to a Blacfin BF547 EPPI port.

The DSP is clocked at 33.333MHz so I've ended up with a pixel clock of 66.666MHz.

I need to create an image on a TV, idealy 1080p24 but I'm flexible on this.

I have calculated and I'm currently outputing the following:

 

1920 active pixels + (4 EAV + 296 hblank + 4 SAV)  = 2224 clocks per line

1080 active lines + 169 vertical blanked lines            = 1249 lines per frame

Hence 2224 * 1249 * 15ns = 41.66666ms per frame (24Hz, spot on)

 

I checked the AD9889, it doesn't recognise the format. As it has no reference to check the frame rate against I can only presume the CEA861 modes have fixed blanking pixel and line counts, hence pixel clock frequencies.

I had presumed it would only depend on counting the active pixels and lines per frame but as there are several 1080p (1920x1080) modes (16,31,32,33,34,46 & 63) I now see it would have some trouble telling one from another by simply counting active pixels.

 

Can anyone give me any pointers regarding CEA861 modes and their pixel clock rates please and what my options are for sub 75MHz

 

I can always change the osc module that clocks the BF547 if required or even supply the EPPI/AD09889 with it's own clock, so long as the frequency is available of course, oh and the pixel clock can't be more than 75MHz (BF547 limit).

 

Thanks to anyone who can help,

Richard.

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