I am observing some undesired and unexplained, periodic phase shifts in the output of my AD9910 eval board. I would appreciate if someone could provide any insight into the source of this discrete phase noise.
I will attempt to provide as much information as possible from the start:
I am controlling the AD9910 eval board entirely from a microcontroller, including controlling each of the DDS update pins. I am providing a 10MHz reference clock and using the PLL to increase the master clock to 1000MHz. I have the DRG mode enabled to set a constant low frequency output of 200MHz, with the OSK mode enabled and set to fullscale amplitude. When I observe the signal, however, there are jumps/spikes that occur at a frequency of about 4kHz. I know that these must be jumps in phase rather than amplitude because I have compared the signal with that of a second DDS, which had the same settings and was known to be working. As further evidence, subtracting the two signals yields a square(ish) wave with a duty cycle of about 20%. Note here that the frequency of these blips was not always 4kHz. It seemed to depend slightly on various DDS settings (e.g. the master clock frequency, the output frequency, the OSK enable bit, etc) and ranged from about 3kHz to 5kHz.
First I suspected the phase noise of the reference clock was too high, but the problem persisted even after switching source clocks. Also, I observed that the output of the sync_clk pin was perfectly stable. Then I thought perhaps the power supply was too noisy, but adding additional filters after each regulator did not seem to help either. I tried to determine if the 4kHz noise could be related to any of the other frequencies within the DDS, but that was unsuccessful as well. Do you think perhaps the device is faulty? If anyone has any other ideas I would love to hear them.