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ADE7953 MISO/SDA/Tx clarification

Question asked by amboyle on Feb 19, 2016
Latest reply on Feb 24, 2016 by dlath

I have a customer that needs help with clarifying the below:

 

 

When a RESET/ Signal is asserted LOW (Forcing a RESET condition)

 

 

 

2

RESET

Active Low Reset Input. To initiate a hardware reset, this pin must be brought low for at minimum of 10 μs.

 

 

 

What is the state of the following signal. Are they TRI-STATE (or not)?

 

 

 

 

 

26

MISO/SDA/Tx

Data Output for SPI Interface/Bidirectional Data Line for I2C Interface/Transmit Line for UART Interface.

27

MOSI/SCL/Rx

Data Input for SPI Interface/Serial Clock Input for I2C Interface/Receive Line for UART Interface.

  Thanks

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