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Is there a an explanation of the ADAU1372 switch matrix available, ie getting DAC_SDATA to DACs please??

Question asked by JezB on Feb 18, 2016
Latest reply on Feb 18, 2016 by DaveThib

I can program and control the four ADCs on the ADAU1372, and see this data on ADC_SDATA0 and ADC_SDATA1 but cannot get any DAC_SDATA to alter the DAC outputs.

Is there any additional explanation information about the ASRC and Input/Output switch matix available???

 

I am generating an SPI programming stream in an FPGA, and writing this in "Burst Mode Addressing"

I assume there is no issue with setting up clock registers 0x00 to 0x06, waiting 6mS for clock stability, then writing to register 0x07 to 0x4D continuously ( writing 0x00 to the "address holes" at 0x09-0x10, 0x12, 0x35-0x37, 0x3A,0x3B and 0x42)

 

I am checking my configuration, and output lines with a logic analyser and scope.

 

Thanks

 

JezB

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