I would like to know about the clock sources which are used in the reference design provided.
Using the custom design, I have been trying to send custom data through the DAC channels and receiving the same post ADC.
I have been using FIFOs for synchronization as mentioned in the WIKI page.
However, I have certain doubts:
1) The clock which is used by the TX and RX modules is the ad9361_clk -- Where is this clock being sourced from?
Is it sourced using the crystal in the FMCOMMS3 or the crystal present on the ZYNQ?
2) If it is sourced by the crystal present on the ZYNQ, is it in phase with the crystal on the FMCOMMS3 (40 MHz) which is used to generate the carrier frequencies?
Finally, I intend to use the processor, to send the data to the custom module ( from which the data will go into the DAC channels) using the AXI-4 interface. In the reference design, is the clock used by the processor and the clock used by the TX, RX in phase?
Is there a way this can be done?