I'm looking to use an ADSP-2136x family device for my main signal processing algorithms. To offload some non-critical fixed point tasks, I would like a high-speed interface between the ADSP-2136x and a FPGA running a 32-bit RISC processor (likely Altera's Nios II). Although I can use PDAP for high-speed data transfer, this is uni-directional and only 20 bits wide. The SPI and Parallel Ports could work for low data rates, but I'm looking for something more integrated between the DSP and uP.
What options exist for the SHARC family to interface with a 32-bit processor?