I am using the Linux driver along with hdl_2015_master to configure the AD9361. The AD9361 (arradio) is connected with Alter SocKit. I would like to test the transmission of the custom data so I have created a FIFO (Sinewave LUT) which passes 64 bit to the util_dac_unpack_channels_data_dma_data[63..0] in hld_2015 master design. I have checked the the transmitted data on the spectrum analyzer and it shows me the spectrum of a sine wave. So could you please tell me that is it the correct way to transmit the custom data?
Furthermore, I would also like to know how to capture the received data on the other board with the same configuration and they both are connected with coaxial cable. I am trying to capture it on the port adc_pack_channels_data_ddata[63..0] using the digital tap signal analyzer in Quartus 15.0 and getting a very random signal. So could you please tell me that am i checking the received data on the correct port?
I have also found the information on your website (https://wiki.analog.com/resources/fpga/docs/hdl) but i would like to use VHDL instead of verilog