the sequence to switch to an external crystal is written in the datasheet for the ADuC 706x (rev. E) on p. 35.
My first question concerns the value written to POWCON0, and the comment on the line above:
POWKEY1 = 0x1; // Enter nap mode
POWCON0 = 0x73;
POWKEY2 = 0xF4;
From my understanding, what these instructions will do (according to table 31) is enter PAUSE mode, not NAP mode: Bit 4 of POWCON0 is still set, which means peripherals are still powered.
To make sure I'm not getting it wrong: Should the comment read "Enter pause mode", or should the value written to POWCON0 be 0x63 (to power down peripherals during the clock switch)? Both values, 0x73 and 0x63, appear to work for me.
Looking at the line loading Timer 1 -- shouldn't the comment read "128 clock ticks"? :
T1LD = 0x80; // 32,768 clock ticks
Last, what is exactly meant by "include a dummy MCU cycle" in the description of POWCON0:COREPD in table 31 on p. 36? Is this condition fulfilled already by the "POWKEY2 = 0xF4" assignment following the write to POWCON0? Or is another (dummy) instruction to be inserted after writing to POWKEY2?
Thanks in advance for your hints.