i've noted that interrupting the system clock to an ADAU1442 can cause, as written on the datasheet, an unpredictable behaviour.
Mostly i get the audio data outputs frozen, so bclk and lrck are still running, while data line remains stuck to zero or
some low value. In this case, everything else but this, seems to work normally.
In other cases everything gets messed up and, in addition to muted outputs, it seems that no other internal operations
are carried out.
Currently i'm using CRC bit to check for program integrity, but it seems not affected during this malfunction due to
system clock disturbance.
On the datasheet it is written that the DSP must be kept in reset state while changing clock, but i don't want to change the clock at all.
I'm just concerned that if any disturbance occurs on the clock, i could have the system down without knowing that.
Is there any way to catch this condition?
Thanks for any help.