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Questions about the signal integrity for 20MHz Data of AD7401

Question asked by tavaritsch on Feb 11, 2016
Latest reply on Feb 22, 2016 by jcolao

Dear Sir or madam!

I have got some questions about the Sigma Delta Modulator AD7401 (@CLK=20MHZ).
The datasheed gave me not the required information unfortunately, so I would
like to place my questions here:

1) What is the minimum rising edge time to be expected at the data output pin

2) Is there a special serial termination required for the MDAT-output pin in
order to reduce reflection-effects? If so, what value is required for the
resistor? What technology is used (C-MOS? What is the output resistance of

Thank you for support!