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FMCOMMS4 FPGA Reference Design: Stop internal DDS

Question asked by Mohandas on Feb 9, 2016
Latest reply on Feb 9, 2016 by DragosB

I am using the following configuration of reference design and my hardware is ZC-706 and FMCOMMS4 (AD 9364)

 

FPGA Reference Design : hdl-hdl_2014_r2

Software : no-OS-2014_R2


I need to send a signal burst and I am using AXI DMA cores provided in the reference design. But at the beginning of the burst I am seeing quite a lot of noise and the Tx transmission appears to not stop even after the Tx DMA has completed. I am considering polling the IRQ_SOURCE register of the DMA and then disable DMA and also disabling transmitter. I am having some problem with it. Our modem (designed by us in the Zynq SOC) misses the preamble in the burst the very first time when we transmit the burst. I think the problem appears to be with following lines of code used to command a DMA transfer:

 

dac_dma_write(AXI_DMAC_REG_CTRL, 0);

dac_dma_write(AXI_DMAC_REG_CTRL, AXI_DMAC_CTRL_ENABLE);

dac_dma_write(AXI_DMAC_REG_SRC_ADDRESS, DAC_DDR_BASEADDR);

dac_dma_write(AXI_DMAC_REG_SRC_STRIDE, 0x0);

dac_dma_write(AXI_DMAC_REG_X_LENGTH, length - 1);

dac_dma_write(AXI_DMAC_REG_Y_LENGTH, 0x0);

dac_dma_write(AXI_DMAC_REG_START_TRANSFER, 0x1);

 

dac_write(phy, DAC_REG_CNTRL_2, 0);

dac_datasel(phy, -1, DATA_SEL_DMA);

dds_st[phy->id_no].enable = true;

dac_start_sync(phy, 0);

 

I am not sure why in the reference design software the last 4 lines of the code (pasted above) follow after the DMA has been commanded to start transfer in 5th line from the bottom. It appears that all the configuration (in terms of selecting DDS or DMA) should happen before the DMA is commanded to transfer.

 

Also when we want to stop transmission, is it recommended we disable the transmitter and also disable the Tx DMA?

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