i'm using the ADV7181C for analog video decoding of non-standard video format. this video format is somewhat unique and i'm having problems configuring the FR_LL parameter.
Video timing parameters are:
H-Frequancy - 9.48Mhz
H sync time - 105.6nS
active - 76.8
pixel clock - 15.642
i'm using the recomeneded 28.63636 Ref clock for the decoder, which leads me to the value of 0xBD0 for the FR_LL register - only that register is 11 bits, and i need a 12 bit register. looking into AN-0978 document (which is refering to ADV7401/3) i see that the FR_LL register used to be a 12 bit register, but not on the ADV7181C.
what do you recommend? can i simply disable the Free running mode? is there a way to overcome this?
what is the recomended PRIM_MODE[3:0]/VID_STD[3:0] for this video type?