I received this question from a customer:
What is the maximum SPI read speed for the AD5231? The datasheet recommends a pull up on SDO of 1K < R < 10K. Will the speed be a function of the pull up resistor value?
The operation of the SDO will be gated by the value of the pull-up resistor. The datasheet uses a 2.2k pull-up to characterize its timing specifications in table 2. There will be some delays as the SDO acquires/releases the line and propogation delays which are impacted by the value of pull-up.
Like any pull-up resistor, the user will have to trade-off speed vs. power. Smaller resistors will result higher speeds but recommend that you remain within the datasheet's recommended range of 1K to 10K for correct operation.
If you are daisy-chaining, you will have to allow some delay for the capacitive loading due to the SDO-SDI interfacing.
Power is not an issue for the customer. They need the fastest interface possible. Using a 1K pull-up, what is the maximum read speed possible?
I'll need to check with the designers to see if they can give a recommendation here. The data was characterized with a 2.2k for its specifications.
Some additional customer input:
Any suggestions on how to achieve 50 MHz on the SPI?
I've contacted you offline to get some more details on the application. We'll update the thread once the issue is resolved.
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