We are planning to use ADF4350 at 1060MHz for our battery operated system where we are planning to put the device in the power down mode to save the power during idle state.
In the Register 2 (DB5-POWER-DOWN) bit & Register 4 (DB11- VCO POWER-DOWN) bits has power down options.
But we need to know the full-chip power down to wake-up (Normal output) settling time. Also our application requires the PLL register contents should not be lost during power down mode.
Kindly provide the settling time and best method to do the power down. Also may I know the CE (Pin 4 -Chip enable) significance in the power down operation, Is it do the same operation as done in the software control method.