I am using AD9914 for fast frequency hopping issue. However when the frequency is hopped from 500MHz to 1300MHz, I have a problem that you can see from attached movie and images in time domain. Digital control signals are coming from FPGA. As you can see there is 192ns undefined region on RF signal. When I measure duty cycle of those two signal, it is 2x384ns. In theory it must stay 384ns at 500MHz than 384ns at 1300MHz without undefined region. I can see both 500 and 1300MHz in this period, but there is 192ns gap at 500MHz. Can you please help me about how I can solve that problem?