We use Microblaze NO-OS AD9361 software running on KC705 Xilinx platform. It can work well with the original initial parameters.
But if I enable the FIR with x4 interpolation,it comes up the error message"Failed-at least one of the clock rates must be equal to the DAC_CLK(lvds) rate".
And I find it reported from the function ad9361_validate_trx_clock_chain.In this function,it compare the DATA_CLK which should be equal to the 2*SAMPLE CLOCK (in 1r1t mode ) with the rx_clock_path[i],if there is no clock be equal to the DATA_CLK,then return
-ENIVAL error symbal.
I enable the FIR filter as follow steps:
and tx fir configured as x4 int, 128 taps, 0 gain;
rx fir configured as x4 dec,128 taps,-6 gain.
and it will recalculate the clock chain,then I get
the the drive will call the ad9361_validate_trx_clock_chain function,then the wrong message show up.but it exeute rightly,cause there is no 80000000 (lvds DATA_CLK rate) on the rx_clock_path chain.
Is there somewhere I ignored? and how should I configure my ad9361 to make it work well?Thanks!