I am using zc706 with ad6676, Vivado2014.4 hdl and no oS revision 2015_r1.
I would like to test external sysref on adc6676. I have already removed resistance R16 and R19 and fill the gap between for R4 and R5 in order to inject the external sysref.
On FPGA I disconnected the sysref connection between jesd_gt ip to jesd204, and feed jesd204 from outside.
I have a question about rx_sync sgnal between jesd_gt and jesd204 tx of adc. I found it is microblaze that supplies this sync signal to jesd204 tx adc.
Is there any other change needs to be made in jesd_gt logic or on the software in order to make exernal sysref enable.
Because, the system does not work it returns only zeros.
Thanks and regards,