We are using IC ADF4001 as a PLL Synthesizer. but we are facing some problems which is listed below:
PLL is performed for frequency range of 76 MHz to 110 MHz. Our Issue is that we are getting continuous 5 V at CP pin of ADF4001 at any frequency PLL is programmed for. We have also referred evaluation board schematic for ADF4001.We are using 8 MHz Crystal Oscillator as REFin and custom designed VCO having characteristic 3.3 MHz/V. We have designed Loop filter using software ADISimPLL only.
And also how much voltage should we expect at mux out pin of ADF4001 when mux out is selected to be AVdd?? Because even though we have provided +5V at AVdd and DVdd pins we are getting 0.7V on muxout pin when mux out pin is selected to be AVdd. We tried to see AVdd at muxout with other ICs but the result is same i.e. 0.7 V. and yes we tried to monitor R DIVIDER OUTPUT, We are getting some distorted waveforms & as we change PFD OR REFin frequency, we get some changes according to it in R DIVIDER OUTPUT. Which type of waveform should we expect at muxout pin?? Can you send us example waveforms at muxout pin for different muxout selections??so that we can analyze it. Kindly find basic schematic of our design attached below.