We can see Audio Clock Frequency issue of ADV7480.
I have questions about it. Please refer attached file "ADV7480_I2S_Audio_Clock_Frequency_Issue_20160126.xlsx".
When HDMI cable is disconnected from Mobile Phone which is outputting audio contents, the frequency of audio clocks are abnormal.
For example, LR_CLK is about 650kHz. (It can be 645kHz, 300kHz or 15kHz etc.) It occurs about once per 100 times cable disconnected.
After that, HDMI cable is connected to the mobile phone again, the audio clocks become normal frequency (LR_CLK = 48kHz).
We can see this issue on both my customer's board and evaluation board (EVAL-ADV748XEBZ).
Scripts I use are as follows:
ADV748x => 01_32_HDMI_to_Pixel_Port_Stereo_I2S_audio_SDR8av_Out.py
ADV7511 => 02_04_720p60_8_bit_422_SDR_AV_codes_Input_Mode.py
And we can see this issue by several mobile phones and MHL to HDMI converters.
There is a SoC on the customer's board. It receives I2S clock and data from ADV7480.
When this issue occurs, the SoC is frozen (SoC can not work) because it increases in a load of audio processing.
And the I2C lines of ADV7480 are only connected to the SoC. So ADV7480 can not be controlled by the SoC with I2C while this issue is occurring.
Question 1: What do you think about root cause and work around for this issue?
If you have any questions or what we should try to, please let me know.
Question 2: How can the audio clock frequency be decided in ADV7480 when it becomes free-running?