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About ADV7441A TMDS Equalization Register Setting

Question asked by Eason_Excelpoint on Jan 13, 2016
Latest reply on Jan 18, 2016 by Eason_Excelpoint

Dear friends,

We have used ADV7441A as the DVI/PAL decode for our video process system, but we have the following issue, could you give some comments about the issue:

1) We found there are some light lines on the ADV7441A output image, the light lines apprearence time and position is random, the

    detail as following:

   

2) We have done the following confirmation:

    a. The source direct display in the LCD is OK;

    b. Short the transmit cable length, the light line will be disappear;

    c. Refer to the following TMDS Equalizer setting:

     

        We manually adjust the TMDS equalization register setting, if we configure the following register value, the issue also can be

        solved:

        For TMDS frequencies of 160 MHz or greater:

  •     User Map 2, set register 0xF0 to 0x20;
  •     User Map 2, set register 0xF1 to 0x0F;
  •     User Map 2, set register 0xF4 to 0x70.

3) So we have the following questions:

    a. Because ADI don't give any more description about the 0xF0, 0xF1 and 0xF4 register, we are not sure our manual adjust can solve

        the issue in all our boards;

    b.What's  meaning of the register 0xF0, 0xF1 and0xF4? Is it similiar with the EQ_DYNx_LF/EQ_DYNx_HF of  ADV7842/ADV7623?

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