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HMC832

Question asked by YYHH on Jan 12, 2016
Latest reply on Jan 15, 2016 by dyoung1

Hi everyone,

 

I have some problems to programm the HMC832 PLL+VCO properly

I used the Evaluation software to test my configuration, and It seems all fine as I can get an output at the correct frequency loading this file:

REVISION 1.0.1.0

REG 1 2

REG 2 1

REG 3 1D

REG 5 FF88

REG 5 710

REG 5 4F98

REG 5 64A0

REG 5 5528

REG 5 7FB0

REG 5 4C38

REG 5 0

REG 6 F4A

REG 7 24CD

REG 8 C1BEFF

REG 9 5F7264

REG A 2046

REG B F8061

REG C 23

REG F 1

REG 10 20

REG 4 41D41E

XTAL 70

VCO_TO_SYNTH_DIV 1

VCO_TO_OUT_DIV 14

 

Nonetheless, when programming the chip from my FPGA with the same register values, I can not get an output signal from the chip. (The programming procedure is ok because I can get test signals from SDO pin).

It seems the chip is sensitive to the order registers are programmed.

 

Is there a special sequence to respect?

 

Thanks.

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