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ADV7612 port B does not work

Question asked by gubuyu on Jan 11, 2016
Latest reply on Feb 2, 2016 by DominicB

Hi,

  I'm debugging ADV7612 now and use port B.  MCU

  I use script below to congfigure adv7619 .But PC does not read EDID information from  internal ram of adv7612.

When i use port A ,it reads EDID correctly.I sets HDMI_PORT_SELECT = A and BG_MEAS_PORT_SEL = B for being capable of fast switch or monitoring the port B while A is selected. I changed HDMI_PORT_SELECT = B and also BG_MEAS_PORT_SEL = A, which should work as well. Is it right? Is there a bug that when HDMI_PORT_SELECT = B it is not allowed that BG_MEAS_PORT_SEL = A?

Give me some suggestion please!

 

    PSIIC0_Write(0x98, 0xFF, 0x1, 0x80); //I2C Reset                                             

    PSIIC0_Write(0x98, 0xF4, 0x1, 0x80); //Config CEC slave address

    PSIIC0_Write(0x98, 0xF5, 0x1, 0x7C); //Config INFOFRAME slave address

    PSIIC0_Write(0x98, 0xF8, 0x1, 0x4C); //Config DPLL slave address

    PSIIC0_Write(0x98, 0xF9, 0x1, 0x64); //Config KSV slave address                              

    PSIIC0_Write(0x98, 0xFA, 0x1, 0x6C); //Config EDID slave address                             

    PSIIC0_Write(0x98, 0xFB, 0x1, 0x68); //Config HDMI slave address                             

    PSIIC0_Write(0x98, 0xFD, 0x1, 0x44); //Config CP slave address                                                                   

    PSIIC0_Write(0x98, 0x01, 0x1, 0x06); //Prim_mode = 110b HDI-GR                                                     

    PSIIC0_Write(0x98, 0x02, 0x1, 0xF2); //Auto CSC, RGB out, Set RGB full grade 0-255 ,change   

    PSIIC0_Write(0x98, 0x03, 0x1, 0x40); //24 bit SDR 444 Mode 0                                 

    PSIIC0_Write(0x98, 0x05, 0x1, 0x28); //AV Codes Off                                          

    PSIIC0_Write(0x98, 0x06, 0x1, 0xA6); //Invert on VS,HS pins

    PSIIC0_Write(0x98, 0x0B, 0x1, 0x44); //Power up part                                         

    PSIIC0_Write(0x98, 0x0C, 0x1, 0x42); //Power up part                                         

    PSIIC0_Write(0x98, 0x14, 0x1, 0x7F); //Max Drive Strength                                    

    PSIIC0_Write(0x98, 0x15, 0x1, 0x80); //Disable Tristate of Pins                              

    PSIIC0_Write(0x98, 0x19, 0x1, 0x80); //LLC DLL phase(0-31,set 0)

    PSIIC0_Write(0x98, 0x33, 0x1, 0x40); //LLD DLL MUX enable

    PSIIC0_Write(0x44, 0xBA, 0x1, 0x01); //Set HDMI freerun                                                            

    PSIIC0_Write(0x64, 0x40, 0x1, 0x81); //Disable HDCP 1.1 features                     

    PSIIC0_Write(0x68, 0x9B, 0x1, 0x03); // ADI recommended setting                      

//    PSIIC0_Write(0x68, 0xC0, 0x1, 0x03); //ADI required write                          

//    PSIIC0_Write(0x68, 0x00, 0x1, 0x08); //Set HDMI Input Port A (BG_MEAS_PORT_SEL = 001b)

    PSIIC0_Write(0x68, 0x00, 0x1, 0x01); //Set HDMI Input Port B (BG_MEAS_PORT_SEL = 000b)

    PSIIC0_Write(0x68, 0x02, 0x1, 0x03); //Enable Ports A & B in background mode         

    PSIIC0_Write(0x68, 0x83, 0x1, 0xFC); //Enable clock terminators for port A & B       

    PSIIC0_Write(0x68, 0x6F, 0x1, 0x0C); //ADI recommended setting                       

    PSIIC0_Write(0x68, 0x85, 0x1, 0x1F); //ADI recommended setting                       

    PSIIC0_Write(0x68, 0x87, 0x1, 0x70); //ADI recommended setting                       

    PSIIC0_Write(0x68, 0x8D, 0x1, 0x04); //LFG Port A                                    

    PSIIC0_Write(0x68, 0x8E, 0x1, 0x1E); //HFG Port A

    PSIIC0_Write(0x68, 0x1A, 0x1, 0x8A); //unmute audio                                

    PSIIC0_Write(0x68, 0x57, 0x1, 0xDA); //ADI recommended setting                     

    PSIIC0_Write(0x68, 0x58, 0x1, 0x01); //ADI recommended setting                     

    PSIIC0_Write(0x68, 0x03, 0x1, 0x98); //DIS_I2C_ZERO_COMPR                          

    PSIIC0_Write(0x68, 0x75, 0x1, 0x10); //DDC drive strength                          

    PSIIC0_Write(0x68, 0x90, 0x1, 0x04); //LFG Port B                                  

    PSIIC0_Write(0x68, 0x91, 0x1, 0x1E); //HFG Port B

 

//configure EDID

    //Manual Hot Plug Detect

    PSIIC0_Write(0x68, 0x6C, 0x1, 0xA1);

 

    //Deassert HPD

    PSIIC0_Write(0x98, 0x20, 0x1, 0x30);

    //Enable internal EDID ram

    PSIIC0_Write(0x64, 0x74, 0x1, 0x03);

    //Initial edid

    Init_Edid();

    delay_nms(20);

 

    //Assert HPD

//    PSIIC0_Write(0x98, 0x20, 0x1, 0xB0);// Assert HPD of port A

    PSIIC0_Write(0x98, 0x20, 0x1, 0x70);// Assert HPD of port B

 

    delay_nms(20);

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