Our custmer have studied with your AD-FMCOMMS2-EBZ.
He is confirming your verilog-HDL source file.
So he put the question as following.
What is your expected input data from ARM?
And what is your expected output data format?
They could not catch on your AD9361 datasheet.
Do you have the good reference document?
He will use FPGA ZC702.
And he will customize of his product due to that he cannot catch the specification of FPGA logic part.