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need help TS101 interrut

Question asked by xinxizyf on Jun 17, 2011
Latest reply on Jun 21, 2011 by xinxizyf

I edit a program: timer_0 interrut. I can enter the interrut rountine, but I can exit. The code is follow. Please anyone debug it.

 

 

/********************************************************************************************************************************/
/*  This program uses DMA channel 0 to DMA N words from internal memory to external SDRAM. Once this DMA has completed     */
/*  DMA channel 0 is then set up to DMA the N words stored in external memory back to internal memory.         */
/*                                   */
/*  The original data to be transmitted is stored in the file tx_data.dat. This data is placed in the buffer named "data_tx"*/
/*  within the internal memory.                        */
/*                                */
/*  The buffer in the external SDRAM where the data originally transmitted is stored into is named "sdram_data"    */
/*                                */
/*  The buffer named "data_rx" is where the data transmitted from SDRAM to internal memory is stored      */
/********************************************************************************************************************************/
//#define __NOUNDERSCORES__       // Depending on the compiler patch installed, the register names as defined in sysreg.h
             // may now have two underscores prepended so that they do not restrict the namespace
             // of user programs. If the old names are required as in this example(without the
             // underscores prepended),
             // define the preprocessor macro __NOUNDERSCORES__ before including sysreg.h.
             // Only required with compiler patch 6.1.7 or later
#include "defTS101.h"
#include "sysreg.h"
#include "signal.h"
#include "stdio.h"


void timer0_int();                 // Prototype for interrupt service routine

void main(void)
{
 
    int i=0;
__builtin_sysreg_write(__SYSCON,0x003879E7);  // 64-bit external bus for memory (MBUB)
__builtin_sysreg_write(__SDRCON,0x00005B05);  // SDRAM enabled, CAS LATENCY = three, Pipe Depth = 0, Page Boundry = 256,
             // Refresh Rate = 1200, PRC to RAS DELAY = 3, RAS TO PRC DELAY = 5,
             // INIT Sequence = REFRESH then MRS(MBUB)

 
interrupt(INT_TIMER0L_P, timer0_int);

//__builtin_sysreg_write(IMASKH, 0x10300000);
__builtin_sysreg_write(__TMRIN0L,0x000000ff);
__builtin_sysreg_write(__TMRIN0H,0x00000000);

__builtin_sysreg_write(__SQCTLST,SQCTL_TMR0RN);
   


while(1)          // Endless loop
  i=i-1;
 
}


/*********************************************************************************************************************************************/
/* Timer_0 Interrupt Service Routine ***********************************************************************************************************/
/*********************************************************************************************************************************************/

void timer0_int()           
// printf("\nExternal memory DMAs completed\n");
int i;
i=i+1;

}

 


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