I'm planning on using the high-speed adc evaluation kit AD-FMCADC2(/3) -EBZ FMC Board with recommended FPGA kit VC707. I only have a little experience in this field and would like to make sure I haven't missed anything important. I have studied the user guides for these devices and the quick start guides and would appreciate it if someone could verify these the things that I'm still a bit uncertain of. The finished product captures the data and applies pulse detection algorithm for the it.
1. The only difference between FMCADC2 and FMCADC3 is the extra amplifier in the latter. Otherwise they work the same way?
2. The interface between ADC and FPGA. The VC707 kit includes the JESD204 evaluation licence but it is eventually necessary to buy the full licence to finish the product? If the full licence is needed the application requires JESD204B since the JESD204A maximum data rate of 3.125 Gbps is not enought for 12bit 2.5GSPS ADC. The full licence for JESD204B is quite expensive and would raise the total cost a lot (~7000$).
3. The reference designs for data capture ADI AD-FMCADC3-EBZ Boards & Xilinx Reference Design [Analog Devices Wiki] and AD-FMCADC2-EBZ Bare Metal Quick Start Guide [Analog Devices Wiki] include the interfaces between ADC-FPGA and FPGA-computer and thus it is only required to add our own DSP/detection algorithm to the code.
Hopefully someone could answer these questions and help me (and possibly others newbies dealing with these issues).