I am now trying to accomplish a talk through program using ADAU1977(ADC), ADSP21489(DSP), and AD1934(DAC).
I have a question about register configuration of the ADC.
I am configuring ADC registers in the order below.
Looking at the ADC’s data sheet p.37, there is a line saying
“The power management control register is used for enabling boost regulator, microphone bias, PLL, band gap reference, ADC, and LDO regulator.”
I understand that configuring this M_POWER register enables PLL according to this line.
A few days ago, I have gotten an answer from ADI “After locking PLL, I can freely configure any registers in any order.”
This M_POWER register is a register that I have to configure at the very first so that the PLL will be enabled?
Could you tell me the exact timing of M_POWER register configuration please?