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AD9361/ZC706 (Building on Vivado issue)

Question asked by crimechb on Dec 15, 2015
Latest reply on Jan 7, 2016 by crimechb

Dear Sir,

 

Tool version:

hdl_2014_r2Vivado 2014.2Quartus 14.0

 

ref. page

ADI Reference Designs HDL User Guide [Analog Devices Wiki]

 

library folder: hdl-hdl_2014_r2\library\axi_ad9361

Project folder: hdl-hdl_2014_r2\projects\fmcomms2\zc706\

 


When executed source ./system_project.tcl  in tcl console and get error message.


ERROR: [BD 5-216] VLNV <analog.com:user:axi_clkgen:1.0> is not supported for this version of the tools.

ERROR: [Common 17-39] 'create_bd_cell' failed due to earlier errors.

 

 

    while executing

"create_bd_cell -type ip -vlnv analog.com:user:axi_clkgen:1.0 axi_hdmi_clkgen"

    invoked from within

"set axi_hdmi_clkgen [create_bd_cell -type ip -vlnv analog.com:user:axi_clkgen:1.0 axi_hdmi_clkgen]"

    (file "../../../projects/common/zc706/zc706_system_bd.tcl" line 57)

 

 

    while executing

"source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl"

    (file "system_bd.tcl" line 2)

 

 

    while executing

"source system_bd.tcl"

    (procedure "adi_project_create" line 107)

    invoked from within

"adi_project_create fmcomms2_zc706"

    (file "system_project.tcl" line 7)

 

How to solve this problem?

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