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Rgarding GPIO state in the reset state, ADuCM320

Question asked by sin on Dec 14, 2015
Latest reply on Dec 17, 2015 by sin



I have some questions from my customer.
The questions are followings.
He has expected that GPIO is high impedance input mode in the hardware reset state.(= B2 pin is low).
But P3.4(C11 pin) seems to be pull down state slihghtly.

1. Is the above state correct ?
2. Does "on the device power up" means "after reset" ?
3. Please let me know the state about other GPIO pins and others in the reset state.

Best Regards